Reiner Pope of MatX on accelerating AI with transformer-optimized chips

Reiner Pope of MatX on accelerating AI with transformer-optimized chips

From Cheeky Pint by Stripe

February 26, 2026 · 1h 13m · Episode 25

About this episode

Reiner Pope discusses the challenges and innovations in AI hardware design with a focus on MatX's approach to chip manufacturing.

Reiner Pope is the co-founder and CEO of MatX, designing specialized chips for Large Language Models. A former Google TPU architect, he joins John to discuss why the current generation of AI hardware is hitting a wall. They cover the "uncomfortable trade-off" between latency and throughput for current chips, why MatX is betting on combining HBM and SRAM to solve it, and the massive logistical challenge of manufacturing chips at scale with TSMC. Reiner also shares his predictions for AI in 2027, why he prefers Rust for hardware design, and why the best iteration loops happen in your head before writing a line of code. Timestamps (00:00:15) Google’s AI revival (00:07:54) MatX (00:17:11) AI supply chain (00:21:48) Designing chips (00:37:11) TSMC (00:44:17) Token pricing (00:44:55) RL-ing chip design (00:49:26) Design to production (00:56:05) MatX culture (01:02:57) Rust (01:05:21) Cuckoo hashing (01:09:35) Unexplored model architectures

People in this episode

Host: John

Guest: Reiner Pope

Topics covered

  • AI hardware
  • chip design
  • Large Language Models
  • MatX
  • AI supply chain
  • technology predictions

Keywords

  • AI
  • chips
  • latency
  • throughput
  • hardware design
  • MatX
  • TSMC
  • Rust
  • supply chain

Mentioned in this episode

Organizations: MatX, Google, TSMC

Products: Large Language Models, HBM, SRAM, Rust

More episodes of Cheeky Pint

Explore listener stats, chart rankings, contacts and more on the Cheeky Pint podcast page.